CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies
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Process-Aware SRAM Design and Test
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Artikel-Nr:
9789048178551
Veröffentl:
2010
Einband:
Paperback
Erscheinungsdatum:
28.10.2010
Seiten:
212
Autor:
Manoj Sachdev
Gewicht:
330 g
Format:
235x155x12 mm
Serie:
40, Frontiers in Electronic Testing
Sprache:
Englisch
Beschreibung:

Prof. Sachdev has authored several successful books with Springer

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

This book covers a broad range of topics related to SRAM design and testing. It includes everything from SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing.
and Motivation.- SRAM Circuit Design and Operation.- SRAM Cell Stability: Definition, Modeling and Testing.- Traditional SRAM Fault Models and Test Practices.- Techniques for Detection of SRAM Cells with Stability Faults.- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques.

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