The Design Warrior’s Guide to FPGAs

Clive "Max" Maxfield received a BS in Control Engineering from Sheffield Polytechnic, England in 1980. He began his career as a mainframe CPU designer for International Computers Limited (ICL) in Manchester, England. Max now finds himself a member of the technical staff (MTS) at Intergraph Electronics, Huntsville, Alabama. Max is the author of dozens of articles and papers appearing in magazines and at technical conferences around the world. Max's main area of interest are currently focused in the analog, digital, and mixed-signal simulation of integrated circuits and multichip modules.

Maxfield provides readers with a "big picture" view of Electronic Design Automation (EDA) which refers to the software and hardware tools that are used to design integrated circuits (ICs), printed circuit boards (PCBs), and electronic systems. Topics covered range from front-end design capture to back-end place-and route and verification and analysis. 300 pp. Pub. 3/04.

Introductio; Fundamental Concepts; The Origin of FPGAs; Alternative FPGA Architectures; Programming (Configuring) an FPGA; Who Are All the Players?; FPGA Versus ASIC; HDL-Based Design Flows; Silicon Virtual Prototyping; C/C++ etc.-Based Design Flows;DSP-Based Design Flows; Embedded Processor-Based; Modular and Incremental Design; High-Speed Design and Other PCB Considerations; Observing Internal Nodes in an FPGA; Intellectual Property; Migrating ASIC Designs to FPGAs and Vice Versa; Simulation, Synthesis, Verification, etc.; Choosing the Right Device; Gigabit Transceivers; Reconfigurable Computing; Creating an Open-Source-BasedDesign Flow; Future FPGA Developments; Appendix A:Signal Integrity 101;Capacitive and inductive coupling(crosstalk), Chip-level effects, Board-level effects, The evolution of delay specifications; Appendix B: Deep-Submicron Delay Effects 101, A potpourri of definitions, Alternative interconnect models, DSM delay effectsSummary, The Ouroboras, Many-to-one implementations; Appendix C: Linear Feedback Shift Registers 101, More taps than you know what to do with, Seeding an LFSR, FIFO applications, Modifying LFSRs to sequence 2n values, Accessing the previous value, Encryption and decryption applications,Cyclic redundancy check applications.