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Autor: Vasilis F. Pavlidis
ISBN-13: 9780124105010
Einband: Taschenbuch
Seiten: 716
Gewicht: 1578 g
Format: 236x195x43 mm
Sprache: Englisch

Three-Dimensional Integrated Circuit Design

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Three-Dimensional Integrated Circuit Design, Second Eition, expands the original with more than twice as much new content, adding the latest developments in circuit models, temperature considerations, power management, memory issues, and heterogeneous integration. 3-D IC experts Pavlidis, Savidis, and Friedman cover the full product development cycle throughout the book, emphasizing not only physical design, but also algorithms and system-level considerations to increase speed while conserving energy. A handy, comprehensive reference or a practical design guide, this book provides effective solutions to specific challenging problems concerning the design of three-dimensional integrated circuits.
Expanded with new chapters and updates throughout based on the latest research in 3-D integration:

Manufacturing techniques for 3-D ICs with TSVs
Electrical modeling and closed-form expressions of through silicon vias
Substrate noise coupling in heterogeneous 3-D ICs
Design of 3-D ICs with inductive links
Synchronization in 3-D ICs
Variation effects on 3-D ICs
Correlation of WID variations for intra-tier buffers and wires

Offers practical guidance on designing 3-D heterogeneous systems
Provides power delivery of 3-D ICs
Demonstrates the use of 3-D ICs within heterogeneous systems that include a variety of materials, devices, processors, GPU-CPU integration, and more
Provides experimental case studies in power delivery, synchronization, and thermal characterization
1. Introduction 2. Manufacturing of 3-D Packaged Systems 3. 3-D Integrated Circuit Fabrication Technologies 4. Electrical Modeling and Closed-Form Expressions of Through Silicon Vias 5. Substrate Noise Coupling in Heterogeneous 3-D ICs 6. Design of 3-D ICs with Inductive Links 7. Interconnect Prediction Models 8. Cost Issues for 3-D Integrated Systems 9. Physical Design Techniques for 3-D ICs 10. Timing Optimization for Two-Terminal Interconnects 11. Timing Optimization for Multi-Terminal Interconnects 12. Thermal Modeling and Analysis 13. Thermal Management Strategies for 3-D ICs 14. Case Study: Thermal Effects in a prototype 3-D IC 15. Three-Dimensional Networks-on-Chip 16. Synchronization in 3-D ICs 17. Case Study: Clock distribution in 3-D ICs 18. Variation Effects on 3-D ICs 19. Power Delivery and Distribution for 3-D ICs 20. Case Study: Power Distribution Networks in 3-D ICs 21. Conclusions and Future Prospects Appendix A: Enumeration of Gate Pairs in a 3-D IC Appendix B: Formal Proof of Optimum Single Via Placement Appendix C: Proof of the Two-Terminal Via Placement Heuristic Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets Glossary Appendix E: Correlation of WID Variations for Intra-Tier Buffers Appendix F: Extension of the Proposed Model to Include Variations of Wires

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Autor: Vasilis F. Pavlidis
ISBN-13 :: 9780124105010
ISBN: 0124105017
Erscheinungsjahr: 01.07.2017
Verlag: Elsevier LTD, Oxford
Gewicht: 1578g
Seiten: 716
Sprache: Englisch
Auflage 17002, 2. Auflage
Sonstiges: Taschenbuch, 236x195x43 mm