Advanced Memory Optimization Techniques for Low-Power Embedded Processors

Prof. Peter Marwedel has published numerous books with Springer

In a relatively short span of time, computers have evolved from huge mainframes to small and elegant desktop computers, and now to low-power, ultra-portable handheld devices. Witheachpassinggeneration,computersconsistingofprocessors,memoriesandperipherals becamesmallerandfaster.Forexample,the?rstcommercialcomputerUNIVACIcosted $1 million dollars, occupied 943 cubic feet space and could perform 1,905 operations per second [94]. Now, a processor present in an electric shaver easily outperforms the early mainframe computers. The miniaturization is largely due to the efforts of engineers and scientists that made the expeditious progress in the microelectronic technologies possible. According to Moore's Law [90], the advances in technology allow us to double the number of transistors on a single silicon chip every 18 months. This has lead to an exponential increase in the number of transistors on a chip, from 2,300 in an Intel 4004 to 42 millions in Intel Itanium processor [55]. Moore's Law has withstood for 40 years and is predicted to remain valid for at least another decade [91]. Notonlytheminiaturizationanddramaticperformanceimprovementbutalsothesign- icantdropinthepriceofprocessors,hasleadtosituationwheretheyarebeingintegratedinto products, such as cars, televisions and phones which are not usually associated with c- puters.This new trend has also been called the disappearing computer, where the computer does not actually disappear but it is everywhere [85]. Digital devices containing processors now constitute a major part of our daily lives. Asmalllistofsuchdevicesincludesmicrowaveovens,televisionsets,mobilephones,digital cameras, MP3 players and cars. Whenever a system comprises of information processingdigitaldevicestocontrolortoaugmentitsfunctionality,suchasystemistermedanembedded system. Therefore, all the above listed devices can be also classi?ed as embedded systems.

The complete application, including data variables and code segments, is optimized

Related Work.- Memory Aware Compilation and Simulation Framework.- Non-Overlayed Scratchpad Allocation Approaches for Main/Scratchpad Memory Hierarchy.- Non-Overlayed Scratchpad Allocation Approaches for Main/Scratchpad + Cache Memory Hierarchy.- Scratchpad Overlay Approaches for Main/Scratchpad Memory Hierarchy.- Data Partitioning and Loop Nest Splitting.- Scratchpad Sharing Strategies for Multiprocess Applications.- Conclusions and Future Directions.